While artificial intelligence (AI) has enabled vast improvements to daily life, it has also resulted in environmental sustainability issues due to its increasing carbon footprint. Applying Tiny Machine Learning (ML) on endpoint devices may be a solution for creating a sustainable AI infrastructure with more energy-efficient computing.
In collaboration with ecosystem partners, Himax has enabled the rapid development and deployment of Tiny ML models, allowing battery powered, memory-constrained, and low cost remote endpoint devices to detect complex motion and classify images with super low power consumption. Himax’s total solution consists of size-optimized pre-trained models running on Himax proprietary AI processor and always-on image sensors, all operating at ultra-low power with around 2 mW average power consumption and 30 ms model inference time in real life applications. Our total solution approach can help developers simplify and accelerate the development of computer vision and AIoT products across a wide range of applications. By performing much of the data processing locally, Endpoint AI not only provides satisfactory cost and power consumption, but also improves latency and enhances privacy and data security. Last but not least, Endpoint AI may be critical in helping reduce the carbon footprint of AI which, with its fast growing popularity, has become a new environmental threat.
Mr. Jordan Wu, co-founder, President and Chief Executive Officer of Himax Technologies Inc., a NASDAQ-listed fabless IC design company headquartered in Tainan, Taiwan. Prior to co-founding Himax, he served as CEO of TV Plus Technologies, Inc. in Taiwan and CFO and Executive Director of DVN Holdings Ltd. in Hong Kong. Prior to that, he was an investment banker in Hong Kong with Merrill Lynch (Asia Pacific) Limited, Barclays de Zoete Wedd (Asia) Limited and Baring Securities, specialized in cross-boarder capital markets and M&A. Mr. Wu holds a B.S. degree in Mechanical Engineering from National Taiwan University and an M.B.A. degree from the University of Rochester, USA.
In a world where there is expected to be 500-billion connected devices by 2030, 59X larger than the expected world population, computation and communication at the edge will become ubiquitous. The low-power IoT market saw its naissance in earnest more than 20-years ago with the launch of the first commercial Bluetooth device. Today, IoT connections are growing at an average rate of 20% per year with no end in sight. The exponential rise in the demand for IoT devices necessitates significant innovation in extending battery life, improving wireless range, increasing performance, and reducing form factors – all within a limited power budget. This talk will highlight innovations in process technology, circuit design, system architecture, and wireless standards that have all collectively enabled the market growth of IoT systems and edge-based platforms. Future innovations required to address new challenges and emerging edge applications will also be explored.
Danielle Griffith has 25 years of experience in the semiconductor industry. She is a Fellow at Texas Instruments in Dallas, Texas, responsible for system architecture of next generation low power wireless connectivity SoCs. Her current focus areas are circuits and architectures for efficient wireless systems, low power oscillators, MEMS circuitry. She has published a book chapter and >50 papers and holds 20 issued US patents. Danielle has given numerous conference plenary-talks and workshop sessions. She has been a TPC member for top IEEE conferences, including RFIC, ISSCC, and VLSI. She is a senior member of the IEEE, an associate editor of the IEEE JSSC, and a Distinguished Lecturer of the SSCS. Danielle Griffith received the Bachelors and Masters degrees in electrical engineering from the Massachusetts Institute of Technology.
There is a trend towards higher network bandwidth and throughput as the connected devices are all over the world. Since the PC and internet market players moved to mobile and cloud, the most of mobile data traffic will come from smartphones. And this trend will be upto 20Gbps peak data rate with 5G while 1 Gbps peak data rate in 4G LTE era. The applications such as HPC, AI and IoT for the connected world will increase the demand of high-speed interfaces such as PCIe, UFS MPHY and other protocols. However, the increasing the data rate are getting harder considering channel loss, cost, and power consumption, while new smart ideas are also becoming pervasive to overcome these limitations.
In this speech, I will present the trends of development of high-speed interface and discuss the insights that are prepared to overcome the challenging limitations. Also, I would like to emphasize the importance of the balance of the performance and power consumption for each application.
Dr. Hyungjong Ko is the Executive Vice President of the Memory Design Platform. He has had extensive technical background in semiconductors since he joined Samsung in 2003. During that time, he was focusing on the design of mixed-signal circuits and responsible for the development of analog IPs for various products. He has brought his technology leadership both analog and high-speed interface IPs for Samsung S.LSI, Memory, and Foundry customers. Now as the leader of Memory Design Platform, he has been focusing on developing memory design verification and design methodology including model parameters, DFT, DFM, and simulation methods.
He received the B.S. degree in electronic engineering from Ajou University and the M.S. and Ph.D. degrees in electrical and computer engineering from the University of Florida, in 1998 and 2002, respectively.
Since the introduction of smartphone almost 15 years ago, it has been evolved to an arena of different up-to-date semiconductor technologies, from the advanced fab nodes to the computation architectures, from the high-speed low power digital circuits to the high efficient analogy/RF chains. The nowadays chipset of 5G terminal is a giant hierarchical computational platform, with multi-core CPU, powerful GPU, in-house optimized NPU, and multi-mode communication processor, etc., rather than a thin modem system. It is widely recognized that the advances of modern semiconductor industry are the pillars of success of the mobile communications systems.
As the further evolution of the communication standards, the next wave of system level innovations of is already on the way. The synergy of communication and sense, the AI for wireless systems especially for the PHY layer signal processing, zero-power (extreme low power) communication, mixed duplex schemes, and so on, have been identified as the key technologies of 5.5G, and possible of 6G for their succeeds.
This talk will review our journey to the 5G era, and share with our viewpoints on the key semiconductor technologies that will support the mobile information system entering the next decades.
Dr. Qiwei Ren has 27 years of experience in the semiconductor industry. He is now the CEO of UNISOC (Shanghai) Technologies Co., Ltd.. He used to work in Philips Semiconductors in the Netherlands. In 2006, he joined the design center of Qimonda Technology in Xi’an, China as the Design Director. In 2009 he promoted the acquisition and re-found the design center as Xi’an Sinochip Semiconductors Co. Ltd, worded as general manager. In 2015 the company was acquired again and renamed as Xi’an UniIC Semiconductors Co. Ltd. In 2018 he started to work as CEO of UNIC memory technology Co. Ltd. He was part time professor in Xi’an Jiaotong University, committee member for memory session in IEDM, and IEEE senior member for many years. He has published many papers and holds issued patents. His work areas are memory (DRAM,FLASH, RRAM etc ) development, and now also extend to mobile telecom and AIoT SoC product development. He received the bachelor and master degrees from Tsinghua Univ. and Ph. D. from Delft Univ. of Technology.