Special Sessions

LEAP (Learn to Establish and Achieve Professionalism)

Session Chair: Hayun Chung, Korea University, Korea
Session Co-chair: Pei-Yun Tsai, National Central University, Taiwan
Date: Nov. 06, 2022 (Sunday)
Time: 16:40 – 18:00 (UTC+8)
Room: Auditorium 國際會議廳, 10F

ID Title / Authors / Affiliation
L1 Technology breakthrough in the field of imaging/sensing
Kazuko Nishimura
Panasonic Holdings Corporation, Japan
L2 Bridging the Gap between Nanoelectronics and Circuits
Vita Pi-Ho Hu
National Taiwan University, Taiwan
L3 Flexible Electronics for Digital Healthcare
Kyeongha Kwon
KAIST, Korea
L4 Rising to the Top by Leaping over Adversity
Alice Wang
Everactive, USA

IT Vision in Asia: Planning the Future of Semiconductor

Session Chair: Minjae Lee, Gwangju Institute of Science and Technology, Korea
Session Co-chair: Chia-Hsiang Yang, National Taiwan University, Taiwan
Date: Nov. 07, 2022 (Monday)
Time: 10:50 – 12:30 (UTC+8)
Room: Song Bo 松柏廳, 10F

ID Title / Authors / Affiliation
IVA1 From Si-Soft to Å Semiconductor- the IT Vision in Taiwan
Chen-Yi Lee
National Yang Ming Chiao Tung University, Taiwan
IVA2 The Era of Agile and Open-Source Hardware
Yungang Bao
Institute of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
IVA3 New waves of semiconductor for future AI pervasive era
Hyun-Kyu Yu
ETRI, Korea
IVA4 Democratize chip design
Makoto Ikeda
The University of Tokyo, Japan

Start-up

Session Chair: Stefan Rusu, TSMC, USA
Session Co-chair: Bor-Sung Liang, MediaTek, Taiwan
Date: Nov. 07, 2022 (Monday)
Time: 16:00 – 17:40 (UTC+8)
Room: Song Bo 松柏廳, 10F

ID Title / Authors / Affiliation
SU1 Intelligent Ultra Low-latency Trading Solution with Deep Learning Inference Accelerators
Jinwook Oh
Rebellion, Korea
SU2 Introduction to Cutting-Edge Wireless Powering System AirPlug® for IoT Applications
Yuji Tanabe
Aeterlink, Japan
SU3 Micro Eye Tracking Solution for the Metaverse
Shao-Yi Chien
Ganzin Technology, Taiwan
SU4 AI-assisted EDA: Intelligent Floorplan Exploration
Tung-Chieh Chen
Maxeda, Taiwan

Industry Forum

Session Chair: Atsutake Kosuge, The University of Tokyo, Japan
Session Co-chair: Bor-Sung Liang, MediaTek, Taiwan
Date: Nov. 08, 2022 (Tuesday)
Time: 16:00 – 17:40 (UTC+8)
Room: Auditorium 國際會議廳, 10F

ID Title / Authors / Affiliation
IF1 RF, mmW and subTHz : Trends and the Outlook Towards 6G
Jon Strange
MediaTek, UK
IF2 Attack-Resistant Cryptographic Circuit Technologies for sub-5nm Secure Computing Platforms
Sanu Mathew
Intel, USA
IF3 General-purpose scalar/vector AI processor for accelerating wide range of tasks including automotive and industrial applications
Masayuki Ito
NSITEXE Inc, Japan
IF4 Key technologies for smart vision sensors
Hayato Wakabayashi
Sony, Japan
IF5 Next-Generation DRAM Solution for HPC and AI
Kyomin Sohn
Samsung, Korea

RiSE (Rising Star Express) Forum

Session Chair: Jaehyouk Choi, Kaist, Korea
Session Co-chair: Hsin-Shu Chen, National Taiwan University, Taiwan
Date: Nov. 08, 2022 (Tuesday)
Time: 16:00 – 17:40 (UTC+8)
Room: Song Bo 松柏廳, 10F

ID Title / Authors / Affiliation
R1 CMOS biotechnology for in vivo monitoring and in vitro diagnostics
Jun-Chau Chien
National Taiwan University, Taiwan
R2 Fast Battery Charging Technology from Integrated Circuits to Systems
Kunhee Cho
Kyungpook National University, Korea
R3 Frequency Synthesis Techniques and Low Flicker Noise Oscillators Towards Sub-50fs Jitter
Yizhe Hu
University of Science and Technology of China, China
R4 Wireless Transceivers for Future 6G Satellite Constellation
Atsushi Shirane
Tokyo Institute of Technology, Japan

Convergence Workshop

Session Chair: Satoshi Tanaka, Hiroshima University, Japan
Session Co-chair: Jui Jen Wu , TSMC, Taiwan
Date: Nov. 09, 2022 (Wednesday)
Time: 11:00 – 12:40 (UTC+8)
Room: Auditorium 國際會議廳, 10F

ID Title / Authors / Affiliation
CW1 3D IC and Advanced Packaging
Kuan-Neng Chen
National Yang Ming Chiao Tung University, Taiwan
CW2 Circuits and packaging systems for security chips
Makoto Nagata
Kobe University, Japan
CW3 Low-power wireless telemetry for interfacing brain
Yao-Hong Liu
IMEC, Netherlands
CW4 Cryogenic CMOS for Quantum Computing
Stefano Pellerano
Intel Labs, USA

ESSCIRC Joint Session

Session Chair: Robert Chen-Hao Chang, National Chung Hsing University, Taiwan
Session Co-chair: Giovanni Mangraviti, IMEC, Belgium
Date: Nov. 09, 2022 (Wednesday)
Time: 11:00 – 12:40 (UTC+8)
Room: Song Bo 松柏廳, 10F

ID Title / Authors / Affiliation
E1 A 1-to-4b 16.8-POPS/W 473-TOPS/mm2 6T-Based In-Memory Computing SRAM in 22nm FD-SOI with Multi-Bit Analog Batch-Normalization
Adrian Kneip
Université Catholique de Louvain
E2 A 10.4-ENOB 0.92-5.38 µW Event-Driven Level-Crossing ADC with Adaptive Clocking for Time-Sparse Edge Applications
Jonah Van Assche
Katholieke Universiteit Leuven
E3 A 28nm 6.5-8.1GHz 1.16mW/Qubit Cryo-CMOS System-on-Chip for Superconducting Qubit Readout
Alican Caglar
imec, Vrije Universiteit Brussel
E4 Fully Integrated Si:HfO2 Negative Capacitance 2D-2D WSe2/SnSe2 Subthermionic Tunnel FETs
Sadegh Kamaei
École Polytechnique Fédérale de Lausanne
E5 A K-Band Gilbert-Cell Frequency Doubler with Self-Adjusted 25% LO Duty-Cycle in SiGe BiCMOS Technology
Lorenzo Piotto
University of Pavia

CICC Joint Session

Session Chair: Woogeun Rhee, Tsinghua University, China
Session Co-chair: Sachin Taneja, Intel Corporation, Singapore
Date: Nov. 09, 2022 (Wednesday)
Time: 11:00 – 12:40 (UTC+8)
Room: Chang Chin 長青廳, 10F

ID Title / Authors / Affiliation
C1 A 112 Gb/s -8.2 dBm Sensitivity 4-PAM Linear TIA in 16nm CMOS with Co-Packaged Photodiodes
Dhruv Patel
University of Toronto
C2 A 20μs turn-on time, 24kHz resolution, 1.5-100MHz digitally programmable temperature-compensated clock generator with 7.5ppm/°C inaccuracy
Yongxin Li
University of Illinois at Urbana-Champaign
C3 A 23-37GHz Autonomous Two-Dimensional MIMO Receiver Array with Rapid Full-FoV Spatial Filtering for Unknown Interference Suppression
Boce Lin
Georgia Institute of Technology
C4 An 0.92 mJ/frame High-quality FHD Super-resolution Mobile Accelerator SoC with Hybrid-precision and Energy-efficient Cache
Zhiyong Li
KAIST
C5 A 3.8-dB NF, 23-40GHz Phased-Array Receiver with 14-Bit Phase & Gain Manager and Calibration-Free Dual-Mode 28-52dB Image Rejection Ratio for 5G NR
Zhixian Deng
University of Electronic Science and Technology of China

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